1. Technical Field
The present disclosure relates to multi-level nonvolatile memory devices and methods of operation, more particularly, to multi-level nonvolatile memory devices whose memory cells include variable resistance element.
2. Description of the Related Art
The bit data of DRAM (Dynamic RAM) and flash memory devices are usually determined by the level of charge stored in memory cells. However, in the case of some nonvolatile memory devices bit data can be determined by the level of current which flows through resistance materials of memory cells. These nonvolative memory devices include PRAM (Phase change Random Access Memory), RRAM (Resistive RAM), and MRAM (Magnetic RAM). The variable resistance material can be phase-change materials such as chalcogenide alloy (PRAM), or MTJ (Magnetic Tunnel Junction) thin films.
Because bit density in a traditional memory chip is determined by the number of memory cells in a chip, fine patterning is an key area to increase the bit density. In most cases, the technique is very costly because it needs more sophisticated lithography equipments and/or pattern correction techniques. An alternative approach, which is widely researched and applied in nonvolatile memory devices, is multi-level memory cell techniques in which a memory cell can store more than one bit.
For example, a PRAM can store more than one bit in a cell by changing the resistance level of the phase changing material into four or more levels.
While the accuracy of write/read operation is a great concern of this technology, minimizing read access time is also a concern of this technology because read access time usually increases as the number of stored bits in a cell increases.